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DO-254 CTS  (разработчик: EDAWay) — is a certifiable at-speed FPGA level in-hardware verification environment dedicated to address the stringent guidelines of DO-254 Section 6 Verification Process. It provides a feasible solution such that FPGA level requirements are easily preserved and verified from RTL simulation to hardware testing. DO-254/CTS consists of a fully customized hardware and software package designed to replay RTL simulation during in-hardware verification by reusing the simulation testbenches as test vectors. It provides a single and automated environment to test all FPGA level requirements with full visibility and controllability at the FPGA pin level.